Join the industrys premier analog company, creating high performance analog devices and subsystems. The Companys leading-edge products include power management circuits, display drivers, audio and operational amplifiers, interface products and data conversion solutions. Key analog markets include wireless handsets, displays and a variety of broad electronics markets, including medical, automotive, industrial, communication infrastructure, and test and measurement applications.
Opportunity:
This key CAD Staff Engineering role will be responsible for the development and support of the physical verification tools, flows and runsets for both analog and mixed signal design using custom and industry tools such as Assura/Hercules from the major EDA tool vendors. This role is critical for future CAD methodology development and involves working with local and remote PDK teams/managers, IC process development, IC designers, CAD tool owners and other developers to define solutions and methodology for future PDK implementation and automation.
This job requires coordination with front-end cad developers, process engineers, model developers and the offshore CAD groups to define and build complex IC design kits for sub-micron IDM and foundry processes. Other areas of expertise which could be leveraged include project leadership, SPICE modeling, Circuit simulation and Digital design techniques and programming skill in SKILL, Perl, Python or Ruby.
The ideal candidate will not only have an excellent technical background, but also seasoned presentation skills, the ability to successfully drive x-functional or project teams, extreme confidence in crossing functional boundaries, interfacing at all managerial levels and a genuine ability to sell new ideas to multiple stakeholders.
Minimum Requirements:
- BSEE or CS and min 10+ years of relevant Semiconductor/EDA industry experience, MS or Ph.D a plus
- Industry experience in leading in EDA, design IP, IDMs or leading IC foundrys
- Wide experience in commercial CAD/EDA tools and Mixed Signal Design flows
- Knowledge of Analog and Deep Submicron BICMOS/CMOS process technology
- Knowledge of Software Development and QA best practices
- Knowledge of Cadence Skill (or Python) P-cell development and QA is desirable
|
