Job #: 34177
Title: Lead front-end ASIC Design Engineer
Job Location: Santa Clara, California - United States
Salary: $180,000.00 - $210,000.00 - US Dollars - Yearly
Employer Will Recruit From: Local
Relocation Paid?: NO
WHY IS THIS A GREAT OPPORTUNITY?
Unique opportunity to join an established international company in their US expansion. Working from the US headquarters, you will have the ability to be an impact player working with other exceptionally talented people. The Front-End ASIC Design Engineer will be a key person in this growing design department. Great opportunity to work on current, ongoing and upcoming new projects.
Great company with a ton of IP, growth opportunity. JOB DESCRIPTION
Front-End ASIC Lead Design Engineer - Santa Clara, CA
2 open positions. Unique opportunity to join an established international company in their US expansion. Working from the US headquarters, you will have the ability to be an impact player working with other exceptionally talented people. The Front-End ASIC Design Engineer will be a key person in this growing design department. Great opportunity to work on current, ongoing and upcoming new projects. Complete lifecycle experience of major SOC projects is required.
Primary responsibilities include:
- Work with customer, vendors and internal teams
- Support customers design through all phases of ASIC execution.
- Ensure designs meets product performance requirements by performing related tasks. Contribute to microarchitecture, RTL design, synthesis, and timing closure.
- Ensure deadline for project milestones are met.
- Work effectively with internal teams, including verification, physical design, FPGA and firmware teams, some globally.
- Display a results-focused attitude and accomplish Company/Team-goals.
- Bachelors Degree in EE or similar degree.
- 8+ years of professional design experience.
- Hands-on ASIC front-end design, ideally in design services environments (product backgrounds acceptable).
- Experience with major SOC projects from start to finish.
- Current architecture, micro architecture and design (RTL) experience is required
- Skills Required Micro-architecture at module/sub-system/chip-level; digital design of complex modules/sub-systems, with solid understanding of clock-domain crossings; integration of IPs/modules/sub-systems designed by internal/external teams; experience using AMBA bus protocols; System Verilog experience; Lint and CDC analysis; timing analysis; excellent debug skills; customer support.
- Teamwork, dedication, collaborative, strong communications and interpersonal skills.
- Ability to meet stringent deadlines and project timelines.
- Skills Desired - Experience in at least few of these: CPU (preferably, ARM), or GPU, or DSP; low-power design and verification; peripheral interfaces such as CSI, I3C, USB, PCIe; FPGA.
- Experience dealing with international teams in a small company environment is desired
University - Bachelor`s Degree/3-4 Year Degree
How to Apply: